1. Field of the Invention
The present invention relates to scanning an electron beam in a predetermined pattern over a surface, and more particularly to processing the pattern by breaking it into sub-fields.
2. Description of Related Art
U.S. Pat. No. 4,494,004 of Mauer, Michail and Woodard for "Electron Beam System" shows the general concept of dividing areas of a semiconductor wafer upon which patterns are to be written into sub-fields employing a stepped sequential scan such as a raster scan to go from sub-field to sub-field, and employing a vector scan within the sub-field.
U.S. Pat. No. 4,234,358 of Celler et al for "Patterned Epitaxial Regrowth Using Overlapping Pulsed Irradiation" shows edge overlapping of results due to the effect of an energy concentration in the center of the energy beam used. The energy beam can be selected from an ion beam, an electron beam, an incoherent beam and a laser beam.
U.S. Pat. No. 4,099,062 of Kitcher for "Electron Beam Lithography Process" uses overlapping exposures at a reduced rate.
U.S. Pat. No. 4,199,689 of Takigawa entitled "Electron Beam Exposing Method and Electron Beam Apparatus" describes exposing of boundary regions at a reduced spot size with different energy concentrations.
U.S. Pat. No. 4,179,316 of Connors et al, entitled "Method and Apparatus for Heat Treating" describes a system wherein the size and the intensity of the exposure can be programmed to any desired configuration and value.
U.S. Pat. No. 4,219,719 of Frosien et al for "Method and Apparatus for Automatically Positioning a Workpiece Relative to a Scanning Field or Mask" employs careful alignment procedures to correct for misalignment in a charged particle beam apparatus. A limitation with the Frosien et al system is that it requires individual sub-field registrations which both consume time and increase data volume. That process also expends silicon area which could otherwise be used for devices by requiring special registration marks.
U.S. Pat. No. 4,310,743 of Seliger for "Ion Beam Lithography Processes and Apparatus Using Step-and-Repeat Exposure" accommodates lateral wafer distortions in the target and optimizes the resolution, throughput, yield and cost of the process.